MOUNTAIN VIEW, CALIFORNIA., September 20, 2021 / PRNewswire / –
Highlights of this announcement:
- Synopsys 128-bit ARC VPX2 and 256-bit VPX3 DSP IP are based on the same advanced VLIW / SIMD architecture as the higher performance 512-bit VPX5, providing greater flexibility for specific application requirements
- The portfolio includes safety-enhanced implementations that meet the requirements of random fault detection and systematic functional safety development workflows for full ISO 26262 compliance up to ASIL D
- MetaWare Development Toolkit with C / C ++ Compiler and Associated Libraries supports length independent vector programming to speed up code development and portability
- Attend the Virtual Summit on ARC Processors on September 21 – 22, 2021, to learn more about the new ARC VPX DSPs and find out about the latest processor IP technologies and trends
To meet the wider spectrum of power, performance, and area (PPA) demands of embedded applications, Synopsys, Inc. (Nasdaq: SNPS) today announced that it has expanded its portfolio of DesignWare IP processors. ® ARC® with the new ARC VPX2 and 256 bit 128 bit processors. 3-bit ARC VPX DSP processors. Based on the same VLIW / SIMD architecture as the company’s higher-performance 512-bit ARC VPX5 DSP processor, the new additions deliver up to two-thirds less power and surface area. The ARC VPX DSP IP family now provides greater flexibility for designers to optimize their designs for the unique power, performance and area (PPA) requirements of integrated workloads such as IoT sensor fusion, radar processing and LiDAR, motor control, speech / speech recognition, natural language processing, and other cutting-edge AI applications.
“AI-enabled devices have a growing need for specialized processors capable of handling a variety of DSP and machine learning workloads with a high degree of power efficiency,” said CL Chen, COO at Neuchips, a major startup of computing solutions specific to the field of AI in Taiwan. . “By expanding the ARC VPX family of processors to support a range of vector lengths, Synopsys enables designers targeting a wider set of applications to implement high performance signal processing in their designs.
“By expanding the portfolio of ARC DSP processors with support for smaller vectors, Synopsys enables signal processing and AI in terms of size, power and thermal stress systems,” said Jim McGregor, Senior Analyst at Tirias Research. “In addition, the ultra-high floating point performance and functional safety compliance of VPX processors make them particularly well suited to the growing number of IoT applications such as automotive, medical systems and industrial automation. Synopsys ARC processors have been used by more than 250 customers worldwide who collectively ship more than 2.5 billion ARC chips per year. “
Scalable and highly configurable DSP processors
The smaller vector-length ARC VPX2 and VPX3 DSP processors, optimized for highly parallel processing with minimal power and area consumption, are available in single or dual-core configurations to meet a wide range of requirements. ‘applications. Each VPX core contains a scalar thread and multiple vector units that support 8-bit, 16-bit, and 32-bit SIMD calculations. VPX DSPs support half, single, and double precision floating point formats, and up to three floating point pipelines are available in each VPX core. Unique hardware acceleration for special mathematical functions used in linear and nonlinear algebraic functions provides high precision results. New VPX DSPs include instruction set architecture (ISA) and load / store bandwidth improvements to deliver up to twice the performance of existing offerings for common DSP functions such as transforms Fast Fourier (FFT). In addition, the security-enhanced VPX2FS and VPX3FS ARCs incorporate hardware security features, including error correction code (ECC) protection for memories and interfaces, security monitors, and locking mechanisms that assist operators. designers to achieve the most stringent levels of ISO 26262 ASIL B, ASIL C and Functional Safety Compliance ASIL D.
Comprehensive software development environment
Like all Synopsys ARC processors, the VPX2 and VPX3 processors are supported by the Synopsys ARC MetaWare Development Toolkit, which provides a vector length independent software programming model specifically optimized for the VPX hardware architecture. The MetaWare compiler’s automatic vectorization feature transforms sequential code into vector operations for maximum throughput. With a robust set of software libraries that include DSP, machine learning, and linear algebra functions, the MetaWare development toolkit provides a comprehensive programming environment that speeds up the time to achieve optimal results and simplifies the portability of applications. software.
“We continue to strengthen our leadership in the industry by expanding the DesignWare ARC family of processors with the latest VPX DSP processors,” said John koeter, senior vice president of marketing and intellectual property strategy at Synopsys. “Synopsys provides designers with a complete line of scalable, software-compatible IP DSP solutions that meet the varying performance, power and area requirements of a chip family.
Synopsys DesignWare’s extensive IP portfolio includes logic libraries, on-board memories, I / O, PVT monitors, on-board tests, analog IPs, interface IPs, security IPs, processors and devices. embedded subsystems. To accelerate prototyping, software development, and integration of IP into SoCs, the company’s IP Accelerated initiative offers IP Prototyping Kits, IP Software Development Kits, and IP Subsystems. Synopsys’ significant investments in IP quality and comprehensive technical support allow designers to reduce integration risks and accelerate time to market. For more information, please visit https://www.synopsys.com/designware.
- The IP of the Synopsys DesignWare ARC VPX2 and VPX3 DSP processors is expected to be available to major customers in Q4 2021.
- The IP of the Synopsys DesignWare ARC VPX2FS and VPX3FS processors is expected to be available to major customers in the first quarter of 2022.
Additional information can be found here.
Virtual summit of the ARC processor, 21-22 Sep 2021
The ARC Processor Virtual Summit will provide you with all the practical knowledge you need to meet your unique PPA requirements. The summit includes a special talk, TinyML and Efficient Deep Learning from Han Song, assistant professor of EECS at MIT. Han will teach TinyML techniques to help you meet the extraordinary demands of Artificial Intelligence (AI) for data, compute, and power in a way that will make your designs greener, faster, more efficient, and more sustainable. . Register to attend the event.
Synopsys, Inc. (Nasdaq: SNPS) is the Silicon to Software ™ partner for innovative companies developing the electronics and software applications we rely on every day. As a S&P 500 company, Synopsys has long been a global leader in electronic design automation (EDA) and semiconductor intellectual property and offers the broadest portfolio of testing tools and services. sector application security. Whether you are a system-on-a-chip (SoC) designer creating advanced semiconductors or a software developer writing more secure, high-quality code, Synopsys has the solutions to deliver innovative products. Learn more at www.synopsys.com.
SOURCE Synopsys, Inc.